MP4 | Video: h264, 1280×720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English | Duration: 12 lectures (1h 59m) | Size: 597.6 MB
analysis, coding, simulation and run on board
What you’ll learn:
FPGA drive UART
Requirements
Verilog basic knowledge
Description
This course will focus on how FPGA drive UART communication. It will finish one task: send data from computer to FPGA through one USB-to-UART cable, after the FPGA receive the data, it will send the data back and show the data on the computer software. It includes the key knowledge as following:
(1) Edge detection;
(2) UART protocol analysis;
(3) UART protocol code in verilog;
(4) UART protocol simulation in Modelsim;
(5) FPGA drive UART system analysis and coding;
(6) Virtual Device coding and simulation skill;
Who this course is for
People who are interested in FPGA
Password/解压密码0daydown
Download rapidgator
https://rg.to/file/1e9cf48dbec4dc0df5f8865a4e7b6c07/FPGA_Drive_UART.part1.rar.html
https://rg.to/file/07bf16c99ef9f18ffc534fcd5b728390/FPGA_Drive_UART.part2.rar.html
Download nitroflare
https://nitroflare.com/view/BDDD5CCA68C8A65/FPGA_Drive_UART.part1.rar
https://nitroflare.com/view/ECC0580AFEAB233/FPGA_Drive_UART.part2.rar
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