Cadence Design Systems, Inc. has unveiled the Cadence Genus Synthesis Solution 19.10.000 – 21.12.000, its next-generation register-transfer level (RTL) synthesis and physical synthesis engine, to address the productivity challenges faced by RTL designers.
The Genus Synthesis Solution is a next-generation RTL synthesis and physical synthesis tool that delivers an up to 10X boost in RTL design productivity with up to 5X faster turnaround times. The solution can scale its capacity to well beyond 10 million instances flat. It also delivers tight timing and wirelength correlation to within 5% of place and route. Using the Genus Synthesis Solution, you can experience a 2X or more reduction in iterations between block-level and unit-level synthesis. In addition, you can achieve an up to 20% reduction in datapath area without any impact on performance.
Watch this overview to see why the next-generation Genus Synthesis Solution is gaining popularity, and learn how this Cadence training class can help you optimize the design with massive parallelization, tight correlation with place and route, and obtain high performance results.
Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world’s most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications.
Product: Cadence Genus Synthesis Solution
Version: 19.10.000 – 21.12.000 *
Supported Architectures: x86_64
Website Home Page : http://www.cadence.com
Languages Supported: english
System Requirements: Linux **
Size: 19.6 Gb
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