Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiled CONFORMAL 19.10.100. This technologies provide you with an independent equivalence checking solution enabling verification of designs from RTL to final netlists from P&R.Cadence Conformal technologies provide you with an independent equivalence checking solution enabling verification of designs from RTL to final netlists from P&R. In addition to standard equivalence checking, the Conformal solution offers:
– Static verification solutions for low-power designs, including low power-aware equivalency checking.
– Automated ECO generation capabilities for minimal netlist changes and faster tapeouts.
– Constraint designer for clock domain crossing and SDC verification solutions.
See how you can achieve dramatic runtime improvement for logic equivalence checks.
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry.
Product: Cadence CONFORMAL
Version: 19.10.100 Base release
Supported Architectures: X86_64
Website Home Page : http://www.cadence.com
Languages Supported: english
System Requirements: Linux *
Size: 1.2 Gb
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Conformal products run on most major UNIX workstations.
X86_64 : RHEL 6 and 7 (64 bit) : SLES 11 and 12 (64 bit)
Supported Design Formats
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– Verilog (RTL and gate-level)
– System Verilog
– VHDL (RTL and gate-level)
– EDIF
– NDL
– SPICE (CMOS)
Supported Library Formats
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– Verilog
– VHDL
– Liberty
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