Mentor Graphics HDL Designer 工具套件，为客户带来生产力更高的设计输入、分析与管理功能，包括更强大的联机资料表格，无论设计复杂性如何，都能迅速建立高品质且结构良好的硬件描述语言。HDL Designer Series可协助工程师迅速输入和分析复杂的ASIC、FPGA和系统单芯片设计，让客户新产品于更短时间内上市。
Mentor Graphics公司HDL Designer Series行销总监Valerie Rachko表示，不管设计工程师采用何种硬描述语言设计方法，HDL Designer Series工具套件都为他们提供一套完整作业环境，使他们能轻易完成硬件描述语言设计、分析和管理。实际应用结果证明，包括Interface-Based Design™在内的多项特色让复杂线路描述更简单；为进一步满足工程师的设计需求，新版本还加强了文件记录、显示、除错与设计管理功能。
以界面为基础的IBD设计方法让复杂设计的线路描述更简单为了让线路设计更简单，以界面为基础的Interface-Based Design（IBD™）设计方法会用观看方便的精简表格来显示线路结构，这个表格编辑环境允许设计工程师迅速指定信号线路，然后产生对应的VHDL或Verilog结构描述，使用者甚至能以功能方块图的形式来观看IBD描述资料。
The software developer Mentor Graphics, is pleased to announce the availability of HDL Designer Series (HDS) 2021.1 is a powerful HDL-based environment used by individual engineers and engineering teams worldwide to analyze, create and manage complex FPGA and ASIC designs.
What’s New in HDL Designer Series 2021.1 – Date: January 2021
The v2021.1 release includes the following new features and enhancements.
HDL Designer
– Subversion Rollback support
– Xilinx Vivado 2020.2 support
– Intel Quartus Prime 20.1 Standard Edition support
SystemVerilog -VHDL Assistant
– General performance and stability improvement
– Xilinx Vivado 2020.2 support
Register Assistant
– Multiple address block support in IP-XACT register definitions
External Tool Support
The HDL Designer Series tool interfaces have been tested with certain external tool versions. Some tools may not be available on all platforms.
Tools Discontinued
The following version management interfaces are no longer supported:
– ClioSoft SOS
– GNU Revision Control System (RCS)
– Microsoft or Mainsoft Visual SourceSafe (VSS)
Java Runtime Environment
SystemVerilog-VHDL Assistant and Register Assistant run on OpenJDK JRE 8u252.
Software Version 2021.1
Refer to the list of issues and enhancements that have been addressed in the v2021.1 release
HDL Designer is a powerful HDL-based environment which delivers new approaches to design today’s most complex FPGAs and ASICs. HDL Designer is used worldwide by individual engineers and engineering teams to create, analyze and manage the design of these amazing devices.
HDL Designer accelerates the productivity and predictability of the project by automating many flows and tasks. Automated rule checking, register generation and documentation and the powerful text, tabular and graphical creation editors save incredible amounts of engineering time and can minimize manually introduced errors. Tool integration and version management of the entire project help keep the team, tools and design process structured, but is still flexible enough through an API to augment existing design flows. Through this automation and project management, the overall quality of the project and resulting chip is improved and project risk greatly reduced.
By using HDL Designer, savings and cost avoidance can be recognized immediately through this automation and will continue with future projects through better design reuse, consistency of coding and improved documentation. For safety- and mission-critical projects, HDL Designer’s design checking, version management, register generation and documentation support adherence to regulatory compliance mandates such as DO-254 and ISO 26262.
Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Product: Mentor Graphics HDL Designer Series (HDS)
Version: 2021.1 build 1
Supported Architectures: x64
Website Home Page : http://www.mentor.com
Languages Supported: english
System Requirements: PC *
Size: 743.9 mb
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